Presentation of the QVL technology as part of hardware security analysis 2nd Army Research Office (ARO) Workshop on Hardware Assurance Washington DC April 11-12, 2011
Download the accompanying slides (PDF)
Fault attacks on secure chips: from glitch to flash (Part 1) - NEW!
Side-channel attacks: new directions and horizons (Part 2) - NEW!
Company overview leaflet
Presentation on AES key extraction, August 2010
Presentation on Bumping attacks, Dec 2010
Video presentation of the QVL technology
and PDF presentation/slides (download)
Trojan Chips Could Cripple US
The Hunt for the Kill Switch
Semiconductor Technology and US National Security
Foreign chips causing concern for the military
Cyberwar: Old Trick Threatens the Newest Weapons
Link to our research partners Effective side-channel analysis project
Hardware and software examples
QVL-P technology evaluation board for trojan, backdoor and key leakage analysis (May/June 2010)
Oscilloscope screen of the evaluation process of QVL technology against password extraction possibility
Very first QVL hardware setup used for security evaluation of highly secure Actel ProASIC3 FPGAs (Jan/Feb 2009)
The tamper resistance research laboratory of our collaborator from the University of Cambridge Computer Laboratory.
Rear side of the sensor prototype, May 2011
Prototype of one of the latest innovative sensors with dynamic configuration and active synchronisation for key, password and backdoor analysis. Front side. May 2011